Length: 2 Days
40/100 Gigabit Ethernet Training Course by Tonex
40/100 Gigabit Ethernet Training covers all aspects of the 802.3ba-2010 in regards to implementations of 40/100 GbE AKA IEEE 802.3ba . It provides two implementations – 40 GbE with four 10 GbE links (or lanes), or 100 GbE with ten such links. An additional standard that uses 25 GbE links is in the works. The main focus for 100 GbE is data centers that need to manage huge amounts of data.
40 Gigabit Media Independent Interface (XLGMII). The XLGMII is designed to connect a 40 Gb/s capable MAC to a 40 Gb/s PHY. While conformance with implementation of this interface is not necessary to ensure communication, it allows flexibility in intermixing PHYs and DTEs at 40 Gb/s speeds. The XLGMII is a logical interconnection intended for use as an intra-chip interface. No mechanical connector is specified for use with the XLGMII. The XLGMII is optional.
40 Gigabit Attachment Unit Interface (XLAUI). The XLAUI is a physical instantiation of the PMA service interface to extend the connection between 40 Gb/s capable PMAs. While conformance with implementation of this interface is not necessary to ensure communication, it is recommended, since it allows maximum flexibility in intermixing PHYs and DTEs at 40 Gb/s speeds. The XLAUI is intended for use as a chip-to-chip or a chip-to-module interface. No mechanical connector is specified for use with the XLAUI. The XLAUI is optional.
40 Gigabit Parallel Physical Interface (XLPPI). The XLPPI is provided as a physical instantiation of the PMD service interface for 40GBASE-SR4 and 40GBASE-LR4 PMDs. The XLPPI has four lanes. While conformance with implementation of this interface is not necessary to ensure communication, it allows flexibility in connecting the 40GBASE-SR4 or 40GBASE-LR4 PMDs. The XLPPI is intended for use as a chip-to-module interface. No mechanical connector is specified for use with the XLPPI. The XLPPI is optional.
100 Gigabit Media Independent Interface (CGMII). The CGMII is designed to connect a 100 Gb/s capable MAC to a 100 Gb/s PHY. While conformance with implementation of this interface is not necessary to ensure communication, it allows flexibility in intermixing PHYs and DTEs at 100 Gb/s speeds. The CGMII is a logical interconnection intended for use as an intra-chip interface. No mechanical connector is specified for use with the CGMII. The CGMII is optional.
100 Gigabit Attachment Unit Interface (CAUI). The CAUI is a physical instantiation of the PMA service interface to extend the connection between 100 Gb/s capable PMAs. While conformance with implementation of this interface is not necessary to ensure communication, it is recommended, since it allows maximum flexibility in intermixing PHYs and DTEs at 100 Gb/s speeds. The CAUI is intended for use as a chip-to-chip or a chip-to-module interface. No mechanical connector is specified for use with the CAUI. The CAUI is optional.
100 Gigabit Parallel Physical Interface (CPPI). The CPPI is provided as a physical instantiation of the PMD service interface for 100GBASE-SR10 PMDs. The CPPI has ten lanes. While conformance with implementation of this interface is not necessary to ensure communication, it allows flexibility in connecting the 100GBASE-SR10 PMDs. The CPPI is intended for use as a chip-to-module interface. No mechanical connector is specified for use with the CPPI. The CPPI is optional.
Source: IEEE 802.3ba-2010
Who Should Attend
Enigineers, Sales and Marketing and Managers
Objectives
Upon completion of this course, you will learn:
- The basic Definitions of Gigabit Ethernet
- Understand the basics of Media Access Control Parameters, Physical Layers, and Management Parameters for 40 Gb/s and 100 Gb/s Operation
- Detailed Architecture and operation of 10, 40 and 100 Gigabit Ethernet
- Gigabit Ethernet Media Access Control (MAC) Interface Description
- Gigabit Ethernet Physical Coding Sublayer (PCS) Interfaces
- Gigabit Ethernet Physical Medium Attachment (PMA) Interfaces
- Details regarding the implementation and operation of the Gigabit Ethernet
- How to test, verify and validate Gigabit Ethernet implementation
Outline
Gigabit Ethernet Definitions
- Media Access Control
- MAC parameters
- Management
- Management Data Input/Output (MDIO) Interface
- MDIO Interface Registers
- Physical Medium Dependent (PMD) sublayer and baseband medium, type 10GBASE-S (short
- wavelength serial), 10GBASE-L (long wavelength serial), and 10GBASE-E (extra long wavelength
- serial)
- Introduction to Ethernet operation over electrical backplanes
- Reconciliation Sublayer and media independent interfaces
- Physical Layer signaling systems
- Management
- Auto-Negotiation for backplane and copper cable assembly
- Forward Error Correction (FEC) sublayer for BASE-R PHYs
- Inter-sublayer interfaces
- Functional block diagram for 10GBASE-R PHYs
- Functional block diagram for 40GBASE-R
- Functional block diagram for 100GBASE-R PHYs
- FEC service interface
- 10GBASE-R service primitives
- 40GBASE-R and 100GBASE-R service primitives
Introduction to 40 Gb/s and 100 Gb/s networks
- Physical Layer signaling systems
- 40 Gigabit and 100 Gigabit Ethernet sublayers
- Reconciliation Sublayer (RS) and Media Independent Interface
- Physical Coding Sublayer (PCS)
- Forward Error Correction (FEC) sublayer
- Physical Medium Attachment (PMA) sublayer
- Physical Medium Dependent (PMD) sublayer
- Auto-Negotiation
- Management interface (MDIO/MDC)
- Management
- Reconciliation Sublayer (RS) and Media Independent Interface for 40 Gb/s and 100 Gb/s operation
- (XLGMII and CGMII)
- XLGMII/CGMII structure
- Mapping of XLGMII/CGMII signals to PLS service primitives
- XLGMII/CGMII data stream
- XLGMII/CGMII functional specifications
- Transmit and Receive
- Error and fault handling
- Link fault signaling
- Physical Coding Sublayer (PCS) for 64B/66B, type 40GBASE-R and 100GBASE-R
- Summary of 40GBASE-R and 100GBASE-R sublayers
Details of 40 Gb/s and 100 Gb/s Implementation, Testing, Verification, Validation and IP
- Physical Coding Sublayer (PCS)
- Functions within the PCS
- 64B/66B transmission code
- Transmit process
- Physical Medium Attachment (PMA) sublayer, type 40GBASE-R and 100GBASE-R
- Position of the PMA in the 40GBASE-R or 100GBASE-R sublayers
- Physical Medium Dependent sublayer and baseband medium, type 40GBASE-KR4
- PCS requirements for Auto-Negotiation (AN) service interface
- 40GBASE-KR4 electrical characteristics
- Physical Medium Dependent sublayer and baseband medium, type 40GBASE-CR4 and 100GBASE-CR10
- PCS requirements for Auto-Negotiation (AN) service interface
- Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE–SR4 and 100GBASE–SR10
- Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE–LR4
- Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE–LR4 and 100GBASE–ER4
- Medium Dependent (PMD) sublayer and medium, type 100GBASE–LR4 and 100GBASE–ER4